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D-HOLO H6c results; H14 pre-registered (full-row writes vs connected lane deltas) - #1566

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Two things in .claude/plans/d-holo-address-indexed-algebra-v1.md: the H6c results, and a new pre-registration, H14.

H6c (measured 2026-10-14, v4)

Probe: holo_tile_crossover_probe (lance-graph-mask-risc example); 5 tests against the row oracle.

Question Result, three runs Verdict
Q1: P/D per query crosses 1 between g = 4 and 16 in both layouts crosses at g = 8–12 HOLDS
Q2: a group-count switch at most 1.25× D everywhere G = 8 worst query 1.21–2.28× D; byte switch 9.8–15.1× not shown: the max-over-fixtures rule is too noise-sensitive
Q3: built from a declaration, P or H at most 0.5× D at N = 100 0.32–0.42× PASS

The terminal selector stays held.

H14 (pre-registered, not run)

For one classid × thought × 64k-row tile, a dirty row is written in one of three ways:

  • A: the full 512-byte SoA row.
  • B: one record per dirty (thought, row) holding the row key, the lane mask and the changed lanes.
  • C: a per-lane table keyed by row. C is a control, kept only to measure what it costs to re-attach lanes to their rows.

Two levels are kept separate: a session holds thoughts (one thought mask per session), and a thought holds lanes (one lane mask per thought and row). A lane is never stored apart from its row.

Rule: B becomes the default only if, at k ≤ 4 changed lanes, its read and session read stay within 1.25× of A and its bytes are at most half of A's. Otherwise A is the default. C is reported, never chosen.

The plan also fixes the grid, the metrics (v4 only, nanoseconds per row) and the disable runs before any probe exists. STATUS_BOARD has a new D-HOLO-H14 row.

Rebased onto main. LATEST_STATE and PR_ARC_INVENTORY were merged by keeping both sides. The entries index was regenerated (--check passes) and SUPERSESSION-INDEX is unchanged.

🤖 Generated with Claude Code

https://claude.ai/code/session_011BMJnDBAfzcuQh5HeT39Rh


Generated by Claude Code

Q1 holds (crossover g = 8-12, both layouts); Q2 no switch certified under
the max-over-fixtures rule; Q3 passes with declared construction. Also the

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_011BMJnDBAfzcuQh5HeT39Rh
Per classid x thought x 64k tile: (a) the full 512-byte SoA row, (b) one
record per dirty (thought, row) holding the row key, the lane mask and the
changed lanes, and (c) a dissociated per-lane control kept only to measure
the re-merge it forces. Session thought masks and thought lane masks stay
separate levels. Rule, grid, metrics and disable runs written before any
probe exists.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_011BMJnDBAfzcuQh5HeT39Rh
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Per-(thought, lane) planes over the tile's row addresses combine by
address-aligned mask folds, so they need no re-join; only a terminal that
asks for rows pays assembly. C becomes a candidate with fold queries F1-F3,
a materialization counter and a three-way rule. Not run.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_011BMJnDBAfzcuQh5HeT39Rh
The address is the register: lane l of row i is Lane_l[i], so a read is a
positional access with no rank or search. Compacted value runs are
superseded. Tables exist only for touched (thought, lane) pairs; persisted
bytes are the dirty positions, resident size reported separately. Not run.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_011BMJnDBAfzcuQh5HeT39Rh
Combining lane tables is the same merge-on-read that overlays dirty bytes on
the base, at one index; the separate re-merge metric for C is superseded.
Not run.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_011BMJnDBAfzcuQh5HeT39Rh
…old)

Arms A (512-byte row image), B (row key + lane mask + packed lanes) and C
(per-lane tables indexed by the row address, merge-on-read). Seven oracle
tests against a dense reference: reads, session mask, lane masks, planes,
F1-F3 agreement, no rows built by folds, one position per lane read.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_011BMJnDBAfzcuQh5HeT39Rh
C folds 10-256x faster than B on F1/F2; C's merge-on-read is 2.8-6.1x
slower than B because it probes every touched lane table. Neither default
rule is met; returned to the operator with the crossover. Next: H14b, a
positional per-row lane mask beside C's tables.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_011BMJnDBAfzcuQh5HeT39Rh
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_011BMJnDBAfzcuQh5HeT39Rh
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AdaWorldAPI marked this pull request as ready for review October 15, 2026 21:17
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Reviewed commit: 96d0837283

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Comment thread crates/lance-graph-mask-risc/examples/holo_tile_crossover_probe.rs Outdated
Comment thread .claude/plans/d-holo-address-indexed-algebra-v1.md Outdated
# Conflicts:
#	.claude/board/entries/README.md
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_011BMJnDBAfzcuQh5HeT39Rh
Codex P2: the old check accepted a ratio above 1 at g = 1 followed by
points below 1, because it compared the last point below 1 and the first
point above 1 without their order.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_011BMJnDBAfzcuQh5HeT39Rh
Codex P2: f2_c ORs one presence window per thought, so its cost grows
with the thought count like A's and B's. The plan said it did not.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_011BMJnDBAfzcuQh5HeT39Rh
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AdaWorldAPI merged commit c18aefc into main Oct 15, 2026
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