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phase-margin

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SIaD Tool: A Comprehensive Frequency-Domain Tool for Small-Signal Stability and Interaction Assessment in Modern Power Systems developed by CITCEA-UPC as part of the MSCA-ADOreD project.

  • Updated Feb 11, 2026
  • MATLAB

Design, simulation(LTspice), and automated Python characterization of a Two-Stage Miller-Compensated CMOS Op-Amp in TSMC 0.18µm. Achieved 71 dB Gain, 52.1 MHz GBW, 63.3° Phase Margin, and 53.7 V/µs Slew Rate with deep-submicron short-channel tuning.

  • Updated Aug 17, 2026
  • Python

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