BradISA — the Brad Devices CPU instruction set architecture: the shared software contract behind every BradCore (Phoenix P-cores, Falcon E-cores), with Verilog/VHDL reference cores
-
Updated
Sep 29, 2026 - Verilog
BradISA — the Brad Devices CPU instruction set architecture: the shared software contract behind every BradCore (Phoenix P-cores, Falcon E-cores), with Verilog/VHDL reference cores
To associate your repository with the bradisa topic, visit your repo's landing page and select "manage topics."