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acp_7_x: clk: enable tick counter in D0 sequence - #11177

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acp_7_x: clk: enable tick counter in D0 sequence#11177
sneha-voona wants to merge 1 commit into
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sneha-voona:acp7x-clk-tick-counter

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Configure CLK_TICK_CNT before change_clock_notify so current clock readback via acp_get_current_clk uses a valid timer threshold.

@intel-sofci

intel-sofci commented Sep 8, 2026

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PR 11177: test results

Run date: 2026-09-08 11:57 UTC

Tested commit: 24f183a3f0e257498672d6c5ed2da8806a2ca6aa

mtl pass rate lnl pass rate ptl pass rate wcl pass rate nvl pass rate

Configure CLK_TICK_CNT after sa_init() so current clock readback via
acp_get_current_clk uses a valid timer threshold.

Signed-off-by: sneha-voona <sneha.voona@amd.com>
@sneha-voona
sneha-voona force-pushed the acp7x-clk-tick-counter branch from 6720fd8 to 24f183a Compare September 8, 2026 11:35
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