São Paulo, Brazil · International collaboration · Applied research
I develop embedded and digital systems, connecting system architecture, FPGA design, firmware and verification. My work spans requirements, implementation, integration, acceptance testing and long-term support.
At Mauá Institute of Technology / NSEE, I combine hands-on engineering with technical leadership and teaching. I have contributed to ground-based simulation and test systems supporting PLATO and EnVision, missions of the European Space Agency (ESA), working with engineering teams across Europe.
Technical and project leadership | Mauá / NSEE
- Lead a multidisciplinary team of approximately four, while contributing directly to FPGA/VHDL and Embedded C development.
- Define the hardware and software architecture, translate stakeholder needs into requirements, and evaluate technology choices against performance, maintainability, schedule and risk.
- Coordinate design reviews, verification planning, milestones and integration with externally developed hardware.
- Conduct weekly technical meetings and reviews in English with international partners.
Technology: Intel FPGA · Nios V / RISC-V · FreeRTOS · SpaceWire · PUS
Lead FPGA development | Mauá / NSEE
- Developed FPGA architectures for a real-time hardware camera simulator, with approximately 20 units built and 14 delivered to European partners and laboratories.
- Implemented SpaceWire subsystems, an RMAP codec, Avalon-based DMA and real-time processing supporting up to eight simultaneous SpaceWire channels.
- Developed verification testbenches and regression tests using ModelSim/Questa, cocotb and Python.
- Supported integration, acceptance testing, commissioning, training and post-deployment troubleshooting with teams including DLR, LIRA, IWF-OeAW, INAF and OHB.
Technology: VHDL · Intel Cyclone / Stratix · Quartus · Nios · Embedded C · FreeRTOS / uC/OS-II
| Area | Technologies and practices |
|---|---|
| FPGA and digital design | VHDL, Intel/Altera, Quartus, Platform Designer/Qsys, reusable IP, DMA, Avalon |
| Embedded software | Embedded C, ARM/STM32, Nios II/V, FreeRTOS, uC/OS-II |
| Communication | SpaceWire, RMAP, PUS, USB 3.0, SPI, I2C, UART, CAN, Modbus |
| Verification and integration | ModelSim/Questa, cocotb, Python, board bring-up, regression testing, root-cause analysis |
| Engineering workflow | Requirements, architecture, design reviews, verification plans, Git, Jira, Confluence |
| Modeling and simulation | MATLAB, Simulink |
I mentor FPGA and embedded-software developers and teach embedded systems across engineering programs. My approach connects technical foundations to practical projects, clear requirements, iterative implementation and verification.
As a technical lead, I coordinate multidisciplinary work, review engineering decisions and support developers from initial architecture through system integration. International collaboration is part of my regular work, including technical presentations, formal reviews and coordination with European partners.
Languages: Portuguese (native), English (C1; TOEFL ITP 620), Spanish (basic).
| Period | Role | Organization |
|---|---|---|
| 2023–present | Assistant Professor · Embedded Systems and FPGA Technical Lead | Mauá Institute of Technology / NSEE |
| 2020–2022 | Engineering Researcher | Mauá Institute of Technology / NSEE |
| 2017–2020 | Laboratory Technician · Engineering Responsibilities / Lead FPGA Developer | Mauá Institute of Technology / NSEE |
| 2015–2017 | Consultant | Deloitte Brazil |
- Ph.D. in Systems Engineering, in progress · University of São Paulo (USP), 2026–present. Research focused on robust software development for aerospace embedded systems.
- M.Sc. in Systems Engineering · USP, 2020–2022. Vehicle control research using MATLAB/Simulink.
- B.Sc. in Electronic Engineering · Mauá Institute of Technology, 2011–2015. Top graduate in the program; academic recognition from CREA-SP.
Academic background and publications: Lattes CV.
I am studying SpaceFibre technology, multi-gigabit SerDes and optical-link concepts as part of my ongoing professional development.
Interested in discussing embedded systems, FPGA engineering, technical leadership, teaching or applied research? Reach me at rodmarfran@gmail.com.