I am a software engineer at Google. In my own time I build programmable hardware, and the build systems around it. Most of that work is open source, and I write about it on hdlfactory.com.
This page lists my public work from October 2025 to October 2026.
- TxHDL is a hardware description
language written as a Rust library, built with Dragiša
(dj3maj).
A design is ordinary async Rust, and the library lowers it to Verilog and
VHDL.
- Vreteno is the RV32IMAC RISC-V core written in it. It runs at 100 MHz on an Artix-7 board with 1 GiB of DDR3. Mainline Linux boots on it to a BusyBox shell, with virtual memory on, and Doom runs on it with HDMI output.
- Razboj is a minimal GPU in about a hundred lines of TxHDL. It reads a display list and draws rectangles and triangles into a framebuffer.
- vreteno-conformance runs RISC-V International's architectural tests (ACT4) on the newest core every day. The Sail reference model checks each result, and each daily report is published as a PDF.
- Cocoapuffs is a RISC-V system on chip on the same Artix-7 board, built around the 64-bit NOEL-V core. Fuchsia's Zircon kernel boots on it end to end, from OpenSBI to userspace.
- wdbcvt reads Vivado's waveform
database (
.wdb), a format AMD does not document. It converts the files to FST and SQLite, and handles over 95% of the format's features, as measured on behavioral VHDL, Verilog and SystemVerilog.
I build FPGA designs with Bazel, from the toolchain up, so that a fresh machine builds a bitstream with one command.
- rules_vivado runs AMD Vivado synthesis, place and route, and programming as Bazel actions. toolchains_vivado installs Vivado itself as an ephemeral toolchain.
- rules_openxc7 does
the same for 7-series parts with the open toolchain: Yosys, nextpnr-xilinx
and Project X-Ray.
It uses the rule names of rules_vivado, so a project switches between the
two by changing one
loadline. I measured the build times of the two side by side. - Simulation and libraries: rules_nvc, toolchains_nvc, toolchains_verilator, rules_vunit, rules_osvvm, grlib (Gaisler's GRLIB and NOEL-V), and rules_ghdl, where I merged 27 changes in that period.
- Firmware: rules_opensbi, rules_dtc and a bare-metal RISC-V GCC toolchain.
A hermetic build uses only tools it fetched itself, pinned by checksum, and nothing installed on the host.
- bazel_local_nix brings Nix packages into a Bazel build with no Nix installed on the host. It runs an ephemeral Nix, unprivileged, in a bubblewrap sandbox.
- bazel_rootfs and xrootfs give a build a pinned Debian root file system, taken from an OCI image.
- bazel-bats, bazel-ebook, rules_shar, rules_latex_host, bazel_graphviz and gotopt2 are smaller rule sets and tools.
In that period I published 43 module releases to the Bazel Central Registry, across the rule sets above.
- google/rust_icu, the Rust bindings for ICU, which I maintain: 52 merged changes in that period. I moved the build to Bazel, added ICU 74 to 77, and automated the releases. I also fixed two memory safety bugs in message formatting: a read past the end of the arguments, and strings passed without a terminating null.
- Smaller fixes: a universal macOS binary for the rain BitTorrent client, support for the Alinx AX7A200B board in fusesoc/blinky, and a documentation fix in uber/hermetic_cc_toolchain.
- synod is a Paxos agent in Go. It keeps a key-value store in agreement across peers that join at any time.
- mkill watches memory use. When memory runs low, it stops the program whose use grew fastest, before the kernel's out-of-memory killer has to act.
- chrome-auto-reload is a Chrome extension that reloads a tab on a timer. It has no access to page content and makes no network requests.
I published 38 articles on hdlfactory.com since October 2025. A selection:
- TxHDL: a hardware description language is just a Rust async runtime
- Linux boots to a shell on Vreteno
- Doom on a RISC-V core written in TxHDL
- Booting Fuchsia's Zircon on a homebrew RISC-V SoC, on an Artix-7 FPGA
- Bazel all the way down: how I build programmable hardware
- My homelab is fully ephemeral
- The FPGA hardware interview: a topic guide with questions and exercises
- Fuchsia Internals, a report series for hardware engineers: Vol. I, graphics and display, and Vol. II, the build system and toolchains.
- Thanklessly Maintaining Open Source Software, a short humor book about a year in the life of a maintainer.
- Languages: Rust, Go, C++, Python, Starlark, shell, VHDL, Verilog and SystemVerilog.
- Hardware: AMD 7-series FPGAs, Vivado, Yosys and nextpnr, Verilator, NVC and GHDL, RISC-V cores and boot chains (OpenSBI, Linux, Zircon).
- Build and operations: Bazel and bzlmod, Nix, Kubernetes, GitHub Actions and Forgejo Actions.
I am a licensed real estate agent in California. My real estate site is re.filmar.us.
- Website: hdlfactory.com
- GitHub: filmil
- LinkedIn: in/filmil





