🔬 SystemVerilog • UVM • Verilog HDL • Cadence Virtuoso • AMBA AHB • SPI • UART • I2C
I'm an Electronics and Communication Engineering graduate with hands-on experience in SoC Design Verification, RTL Design, FPGA Development, and Digital IC Design. I enjoy building reliable digital systems and developing verification environments using industry-standard methodologies.
- 🚀 Developed UVM-based verification environments using SystemVerilog
- ⚡ Designed and verified RTL modules using Verilog HDL
- 🔍 Verified AMBA AHB, SPI, UART, and I2C protocols
- 🛠️ Performed functional verification, debugging, and waveform analysis
- 📏 Executed CMOS design, DRC, LVS, PEX, and post-layout verification
- 💡 Built FPGA-based digital designs using Quartus Prime and Xilinx Vivado
I aim to contribute to the semiconductor industry by developing robust, efficient, and thoroughly verified digital systems.
- Developed UVM testbench to verify AHB transactions
- Implemented drivers, monitors, and coverage checks
- Verified protocol compliance through simulation
- Designed UART transmitter and receiver in Verilog
- Verified serial data transfer and frame integrity
- Simulated and tested on FPGA
- FSM-based Verilog design
- Supports addition, subtraction, and multiplication
- Output displayed on dual 7-segment displays
⭐ If you like my work, consider starring my repositories
🚀 Always learning. Always building.