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fix(dpc): wrap the DPC ring indices modulo capacity (#642) - #699
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DpcQueue indexed its 128-entry ring with monotonically increasing u16 head/tail counters and never reduced them modulo DPC_QUEUE_SIZE. After 128 cumulative enqueues (drains do not reset the indices) enqueue/dequeue indexed out of bounds and the kernel panicked at DIRQL/DISPATCH. - enqueue/dequeue: index entries[(idx) % DPC_QUEUE_SIZE], mirroring infra/work_queue.rs. - test: dpc_ring_wraparound — 300 single enqueue+dispatch cycles plus 40 full-capacity fill/drain bursts on one queue, asserting FIFO order and no panic (the pre-fix code indexes out of bounds at the 129th enqueue). Full-queue false return and DPC_DROPPED_COUNT accounting are unchanged. Verified: QEMU 954/954; VirtualBox 954/954.
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Fixes #642.
Bug
DpcQueueindexed its 128-entry ring with monotonically increasingu16head/tailand never reduced them moduloDPC_QUEUE_SIZE. Drains do not reset the indices, so after 128 cumulative enqueues on one CPU the nextenqueue/dequeueindexed out of bounds and panicked (bounds check) at DIRQL/DISPATCH.Fix
Index modulo capacity in
enqueueanddequeue, mirroringinfra/work_queue.rs. Full-queuefalseandDPC_DROPPED_COUNTaccounting unchanged.Regression test
dpc_ring_wraparound: 300 single enqueue+dispatch cycles plus 40 full-capacity fill/drain bursts on one queue instance, asserting FIFO order and no panic. The pre-fix code indexes out of bounds at the 129th cumulative enqueue.Verification
neodev test: 954/954 (was 953).neodev test --backend virtualbox: 954/954,dpc_ring_wraparoundPASS.