[AdaWorldAPI]

Two reusable FACET STRIDE primitives in a new src/simd_stride.rs: lut_u8 (a byte table) and lut9 (an odd function over the sign-magnitude 9-bit lane from #381). Also the FACET STRIDE rule that their development produced, enforced from now on by a guard.

███ FACET STRIDE ███

'{0}..{15}' -f $128.split()

A 128-bit value is sixteen u8 positions. One mov reads all sixteen; nothing has to move to read one. The precedent is ternary_match_strided16_to_mask: it loads 16-byte registers with plain moves and reads every byte position in place.

1. Never compute with byte shuffles (shuffle_bytes, permute_bytes, *_shuffle_epi8, permutexvar_epi8, swizzle_dyn, vqtbl*). That rules out lookups or folds assembled from shuffles plus masks. A shuffle is only for a genuine byte move that a one-mov cast cannot do.
2. Scalar loops only in simd_scalar.rs. They are forbidden in the AVX2, AVX-512, AVX, NEON, wasm, AMX and nightly backends when a split realization exists (on AVX2: two U8x32).
3. u8 has no sign. Never mix u8 and i8.

Where it lives:

• CLAUDE.md: the rule, at the top of the file.
• .claude/blackboard.md: the decision record.
• .claude/hooks/facet-stride-guard.sh: a PostToolUse hook on Edit/Write/MultiEdit, wired in .claude/settings.json.

What the guard checks: lines a change adds, judged with the whole file as context.

• R1: a shuffle used to compute. A shuffle wrapper's own definition is not compute.
• R2: a scalar lane loop in a non-scalar backend.
• R3: a u8/i8 mix: a cast to i8 inside a U8 type, to u8 inside an I8 type, or a u8/i8 conversion on one line.

Test modules are skipped, including multi-line #[cfg(all(test, ..))] and mod *tests. A hit blocks the edit (exit 2). The waiver is // facet-stride: ok <reason>, and a reason is required. --diff <rev> checks a range, --all audits the tree, and --root <dir> audits another checkout.

Exclusions (.claude/hooks/facet-stride-exclude.txt, each with a mandatory reason) are only for code whose byte shuffle is the defined operation:

• vendor/chacha20: cipher rotations by 8 and 16 bits.
• src/hpc/perm.rs: Perm64 is a permutation map.
• examples/ternlog_popcnt_gap_probe.rs: it measures the anti-pattern on purpose.

Verified:

• It fires on the U8x64::lut256 code this branch used to carry.
• It fires on a probe line for each rule.
• It stays silent on clean added lines.
• It honours a waiver with a reason and rejects one without.
• --diff origin/master on this branch: 0 hits.

The existing trees are not clean (burn-down lists, not precedents):

• ndarray: 166 hits outside tests (.claude/knowledge/facet-stride-audit-2026-10-27.txt).
  • R1 7: all nibble-table popcount (bitwise.rs ×4, simd_avx.rs, simd_avx2.rs ×2).
  • R2 157: simd_avx2.rs 81, mostly the array-backed AVX2 types; NEON 26; nightly 28; AVX-512 12; wasm 10.
  • R3 2: the u8 splats that cast to the i8 intrinsic parameter (AVX2, AVX-512).
• lance-graph: 10 hits, all R1 nibble-table popcount with raw intrinsics (holograph/src/hamming.rs ×2, blasgraph/ndarray_bridge.rs ×8). It has no cipher shuffles, so nothing there is excluded.

simd_stride.rs

pub fn lut_u8(values: &[u8], table: &[u8; 256], out: &mut [u8])
pub fn lut9(magnitudes: &[u8], signs: &[u64], table: &[u8; 256],
            out_magnitudes: &mut [u8], out_signs: &mut [u64])

Both are re-exported through ndarray::simd, together with FACET_BYTES = 16.

lut_u8 computes out[i] = table[values[i]]. Each 16-byte facet's positions are read where they sit and address the table directly.

lut9 works on the SM9 lane from #381: a u8 magnitude per row, a u64 sign plane, and a separate presence plane. An odd function (f(-x) = -f(x)) needs one table over the 256 magnitudes, and the sign passes through.

• The magnitude lookup is lut_u8.
• A negative value whose result rounds to zero is stored as +0.
• An input -0 stays -0, the way IEEE arithmetic carries NaN through.
• table[0] must be 0, or the call panics. A missing row is presence clear over 0, so it stays 0, and the presence plane is never read or written.
• The sign plane is 64 rows per U8x64::cmpeq_mask. The tail is padded with 0 and masked off the sign plane.

How it got here:

1. Four 64-entry permute_bytes. This was 5.6× slower than a scalar loop, because without AVX-512 VBMI permute_bytes is a scalar loop.
2. A 16-row in-lane vpshufb plus a mask fold (U8x64::lut256 on all six backends). This is the shape the rule forbids, and its nightly arm did not compile.

Both are gone, and lut256 is removed from every backend. lut9 was briefly named odd_lut_u8 on this branch.

Measured

examples/lut9_bench.rs, AVX-512 host without VBMI, 1 Mi elements. The outputs are checked against the scalar form before timing.

path	ns/elem
i8 table, no sign plane	0.595
u8 table + sign plane, scalar	0.608
lut9	0.503

Tests

• Unit tests (7):

  • lut_u8 at 14 lengths around the 16-byte facet;
  • lut_u8 reading every table entry;
  • lut_u8 refusing a short output;
  • lut9 at every magnitude, at every lane position and at 12 lengths around the 64-row seams, with junk sign bits past the end and pre-filled outputs;
  • lut9 rounding to +0 while keeping an input -0;
  • lut9 refusing a table with table[0] != 0;
  • lut9 refusing a short sign plane.

• Parity groups:

  • 0x14xx (lut9): 11 lengths × 2 passes.
  • 0x15xx (lut_u8): 12 lengths.
  • CHECKS goes from 21 to 23 (master already has simd: NaN/presence bijection and SQL NULL=NaN predicates #381's two groups).

• Disable runs. Each was red in both the unit tests and the parity group.

  guard removed	parity
  lut9: input -0 kept	0x14a3
  lut9: tail rows masked off the sign plane	0x1421
  lut9: lookup reads the right position (table[m ^ 1])	0x1401
  lut_u8: the tail is looked up	0x1501

• Lint: clippy -D warnings is clean on the lib, the tests, the examples and the parity crate.

• Backend arms, at e47d456 (before the merge with master): 9/9 pass. Every arm that prints its group count reports all 21 groups: native AVX-512, AVX2 (config-v3), NEON qemu, AVX qemu, v2 qemu and nightly. wasm, wasm-scalar and wasm-relaxed pass their self-check.

• After merging master (simd: NaN/presence bijection and SQL NULL=NaN predicates #381): the parity crate conflicted on the import list and the group list; both now carry both PRs' entries. Native parity passes 23/23 groups. Clippy, rustfmt and the guard (--diff origin/master, 0 hits) are clean, and the lib simd_ tests (471) and the sm9_presence_probe tests (7) pass.

Open

• The polyfill shuffle_bytes gives different results across backends when an index has bit 7 set. AVX2 U8x64::shuffle_bytes and permute_bytes are scalar loops. Both are entries in the audit list.

🤖 Generated with Claude Code

https://claude.ai/code/session_01XAqKMPh2Seh2WLccCksAdY

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