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AdaWorldAPI
ndarray
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simd: agnostic gemm_u8_i8 surface, integer-slice-op lift, per-CPU matrix, BF16 AMX wiring
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#182
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May 21, 2026
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simd: agnostic gemm_u8_i8 surface, integer-slice-op lift, per-CPU matrix, BF16 AMX wiring
#182
AdaWorldAPI
merged 12 commits into
master
AdaWorldAPI/ndarray:master
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claude/continue-ndarray-x0Oaw
AdaWorldAPI/ndarray:claude/continue-ndarray-x0Oaw
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Commits on May 20, 2026
feat(simd): agnostic gemm_u8_i8 surface — compile-time dispatch chain
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feat(simd): AVX-VNNI ymm arm for gemm_u8_i8 + bump avx512 cfg to SPR
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test(simd): ignored timing harness for gemm_u8_i8 vs scalar
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feat(simd): restore array_windows + add slice-level add_mul_f32/f64
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docs(simd): per-CPU agnostic-surface resolution matrix + integration plan
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docs(simd): expand per-CPU matrix — full integer-lane storage + Phase 6
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feat(simd_int_ops): MX-T1a — lift add_i8 / sub_i8 / add_i16 to polyfilled lanes
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docs(simd): flip MX-T1a cells + lock in asm-byte rule for AMX/F16
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Commits on May 21, 2026
feat(hpc/amx_matmul): TD-T1 — wire matmul_bf16_to_f32 AMX arm to tile kernel
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feat(hpc/amx_matmul): TD-T1b — matmul_f32 AMX arm routes through tile kernel
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style: rustfmt cleanup for fmt --all CI gate
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feat(hpc/amx_matmul): VDPBF16PS arm — AVX-512BF16 BF16 GEMM tier
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